WEBVTT

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I've been responsible for fetching everywhere with five instruction that you'll find

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in there and for validating against outside sources.

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So today I'll talk you about challenges with brief first ecosystem specification, things

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that I've encountered, then I'm going to delve into the unified database and I'll do a little

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call for help.

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So background and bio-ismeters will go to, it's going to be the first topic and then I'll

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go into challenges that consumers and producers face.

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So currently the risk-five ecosystem relies on multiple repositories, there's somewhat disconnected

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and the ways for repositories that you'll find describing the ISA will be the ISA manual

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that describes the whole ISA, but still there are other repositories like the assembly manual

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which describes some pseudo-instructions, risk-five upcodes which has database of all instructions

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or almost all of them and still risk-five which is a detailed formal specification of how

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the risk-five equals of the risk-five ISA.

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But you still do have a lot more repositories around the risk-five ecosystem, particularly

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non-ISA that's the case for some peripherals like the advanced input architecture, a clean

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bleak and the ILM and you, you'll find even more if you look for this is when no means

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all of them.

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So technical challenges that we find in this, I'll mostly go over the risk-five ISA manual,

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the assembly manual, up-risk-five upcodes and the self-specification.

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So the ISA manuals have somewhat of a challenge that is they're not machine-readable

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and therefore they're not very fireable, at least not machine-verifiable.

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And they also don't come in a version schema.

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Well, the ISA schema, all the extensions have schemas, but their source of the repository

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is not really schema-based.

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Moreover, you'll find the assembly manual, the assembly manual also is not machine-readable

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or very fireable in the same sense, it also does not come in a version schema.

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And it's not a clear and concise index, also it may not be its purpose, but you cannot

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find all the sort of instructions under the risk-five ecosystem there.

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Moreover, risk-five upcodes is also definitely not version, there's no version you can

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find in there.

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And again, it's not a fully descriptive database of all the instructions risk-five

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heads.

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So I'll go more on this later.

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And cell risk-five, well cell risk-five is not so-local, this isn't really a challenge,

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cell is and it might be a so-local, it's a formal specification, but then when you try

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to parse it and when you try to read it, you'll find yourself in a bit of a field challenges.

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Now, challenges that consumers face, consumers and by consumers, I mean all of us

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that use the risk-five ecosystem.

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Well, since the information is not cross-referenced, it might be tricky.

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So if the ISO manual describes an instruction as it happens on the left example, you can

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see that there is in codeings, in this case, and there is a text description, this is a full

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paragraph that describes, I believe, 18 instructions, all the registered operations.

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But there are even cases as the FCVT model, which is just a modular convert to integer,

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where you can't even find the encoding for it in the manual.

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And although it exists in risk-five occult, there is no clear reference to it, so you'll

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basically have to dig and find it out.

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Now, more challenges.

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There are some inconsistencies throughout the different documents, and what do I mean by

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it is?

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Some of these documents are maintained randomly, they're not ratified, and they're not verified

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by the big groups, but by the big amount of groups that ratifies main manuals.

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So in this case, you'll see that there is a destable, which is in the ISO manual, which

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is quite nice.

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You can understand that they're mapping some pseudo-instructions to their instructions,

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and it makes perfect sense, although the assembly manual is the one that has most

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pseudo-instructions.

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So why would this be in the ISO manual and not in the assembly manual, because it was not

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at the time I took this screenshot.

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No, it is, but still the point remains, because this is the flow I found.

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I believe there are many more.

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Moreover, this is not refined in risk-five occult, at all, there are big amount of

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pseudo-instructions who are not there, and this is one of those cases, because this isn't

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even supported.

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If you look at it, this is kind of a normal pseudo-instruction, you can see that the

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register's are swapped to make it from greater than to make it from less than to greater

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than.

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It's pretty standard, but risk-five occult, as I'll show, cannot handle this, and why

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is that?

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Well, risk-five occult uses a really simplistic representation for instructions, and the

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representation goes as this, and as you see, the only thing you would, in theory, have to

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do would be to swap the arguments, and you'll have your definition.

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Well, say enough, with five occult's, backhand cannot handle this, and it cannot know, and

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it does not know in what order the register's coming, so yeah, there is no way this is

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going to be in there, unless it's patched.

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Now, fixed values are also not supported, this is also quite common in pseudo-instructions,

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whenever you have to do an equal assignment, just in this case, you do, risk-five

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occult's also cannot parse that error.

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Now, usability challenges, let's continue with these.

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Developers have a lot of different places to searching, and I just showed you a couple

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repos, there are a lot of them, and sometimes it gets tricky for you, and well, I myself

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find myself in, find me in this situation quite a lot, I have a lot of source of truth

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as to go through, and yeah, that's how my search for information usually looks like.

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Now, for producers, for IP vendors, for anyone that is trying to do a risk-five CPU, this

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is also a problem, because you will want to document what you're doing.

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And well, if the main source is written in a nice kid-up, that's the technology that

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it's used for it, you can see that it is mostly text, and it will be like this for

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the whole menu.

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So, first of all, you won't be able to verify it at all, and then how will you create

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your downstream documentation?

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Well, you'll find yourself in a case where you'll need to copy paste or rewrite the

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spec, and this is a lot error-prone, because whilst the ISO manual is read by, well, probably

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everyone here has already looked into it, and I believe thousands or tens of thousands

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of people have already read it, to catch errors, ERCPU will probably not be read by 10,000

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people.

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So, how will you deal with small flaws that may arise?

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Well, it's not really that easy.

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Again, there is another problem, that is, risk-five is really extensive, there are a lot

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of different extensions, you can implement, that's one of the great parts of risk-five,

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but you'll find yourself with designs like this, which is really nice in some part, but

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if you're trying to do documentation, and even if you're taking consideration that from

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these extensions, you'll need to look for the specific version that you want to implement

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in your CPU, nowadays most of them are 1.0, 2.0, but we can imagine that in the next few

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years, we'll get 3, 4, 5, and you'll basically need to do a lot of work.

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So documentation ends up being a really complex task, that's something we don't want

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to happen, and it will be hard to keep up with upstream, it will be expensive, and it will

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also be time consuming.

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Additionally, if you're an IP vendor that's trying to do things fast, well, one thing

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that you don't want is documentation to be your bigger roll block, right?

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Yeah, and fortunately, there is no existing solution for you to go around these yet.

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So, what happens with all these repositories is that I was actually assigned, that's an

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option to try to find a way to go around all of them and to figure it out, or how we

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can connect it, connect them, but what happened was I, I could not, I have really a mental

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question that I was thinking about, like, how am I going to work with this?

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Well, that's why I bring you the risk-5 unified database.

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So in this section, I'll try to go over a few things, I'll go about what is the UDB, what

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how the UDB relates to current challenges, and some use cases that are now and will be in

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the future, I believe, useful, where the UDB will be useful for and some future work.

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Now, this is kind of abstract, it's really high level representation of UDB, but on the left side,

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you'll see that this is a golden source of truth, this is where your spec goes in, where it is already

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and additionally, you can add your custom overlay, if by any change, when you're implementing

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a risk-5 core, you want to change something on the main spec, you can overlay it over there.

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Then, this gets resolved, you get the results spec, you get to pass your own config, because if you're

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implementing a risk-5 core, everyone will have a different design, different design of which

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that you want to accommodate, and then you'll get your Ruby database view from which you can generate

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multiple outputs. So documents are already being generated, there is a really simple ISS also being

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generated in instruction set simulator, really, really basic one, just to show the purpose of it,

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and then you'll have some raw data, which you can do whatever you want with.

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So, basically, before going in depth on the output, I'll just briefly explain what is there

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on the source of truth. So, you have your basic CPU instructions, which you may be aware of,

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so, arithmetic, logical operations, everything we are already used to. Then we have CSIres,

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this is the risk-5 control and state registers, there's a special purpose management,

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registers that are used for your CPU to know its state, and many more other things.

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Then you have Profile, so, risk-5 defines some subsets of the ISO that allow for

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compatibility across different implementations. So, if you follow a certain profile,

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you'll know that your software will be fine. And then you have architectural parameters,

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this is really for vendors and people implementing that want to show their design choices,

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there you have 32 or 64B, if you want to implement each one of them, but really there are many,

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many more. I'll go now a bit more in depth about the first three ones, and I'm starting with

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instructions. So, instructions where described by name, long name, description,

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defined by basically the extensions that define that instruction, and then you have the

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in-golvings, matching variables, this will be your registers, your access mode that your

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instruction is accessible from, and then you'll have formal specification. In this case, we have

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sale, the most known risk-5 formal specification, and there is IDL, IDL was developed by

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welcome, it's much easier to read than sale for normal users, but yeah, both are present in the output,

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so you can choose. This is what it looks like for a basic integer of instruction, you have your

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ad, your integer of brief description of in this case adding to registers, you get the instruction

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that defines it, the ad is in the device ISO, so it's the i extension, you have the assembly

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code for it, you have the encoding, what's hard-coded, and what are the variables, these guys,

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you have source 1, source 2, and your destination register, you have where you can access it from,

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from a mode standpoint, whether you're in supervisor, in user mode, virtualized supervisor,

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or virtual user mode, and then you'll have the independent timing, this is for some cryptographic

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extensions where you want your instruction to always take the same time, you can define it,

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and then you have the IDL, that's the operation, that's a formal description, and that's sale,

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these are both compatible, so that you can know exactly what each instruction does.

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Okay, going back to your size now, CSRs have pretty much the same schema, but for their own purpose,

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so you have your name, long name, the address, that your CSR is in, you can see that this

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case, it's in thread, it's at 0x02, then you'll have your description, the privilege mode,

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it can it is accessible from the length, the extension that defines it, some fields, in this case,

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it's a counter, so it's pretty simple, but this gets way, way more complex, and here I've

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definitely shortened this software with, this is IDL, and I've shortened it because it was really,

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really way bigger for this presentation. Now profiles, we also described profiles so that you can

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easily generate your outputs based on the profile we want to follow, so if we take a look at the profiles,

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you'll be able to see that for these profile, it is RVI20U32, you'll have the base where you can,

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you can be the base that it follows, in this case obviously, I mean 32, it is 32 bit, before it,

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you have the mold you can access it from, it's just a privilege in this case, and then you have

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introduction, a brief introduction for your profile, this will be useful for documentation purposes,

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if you're trying to build it, and then you'll have the extensions that your profile profile defines.

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In this case, it's shortened because again, it will be way too big. Moreover, you can even define

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some small text as a recommendation and you'll see how this looks in the outputs. So now,

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passing from the golden source of truth that we were talking about, we're going to go into the

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framework and how this works, I won't go much in depth here, but basically, as the framework,

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as I explained in the first design slide, the framework will resolve all your source,

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and then it will merge it, and while it's resolved, and then you'll basically apply a

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config to it, and from this config, you'll choose either your profile or your specific profile that you want to.

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So here you can see a couple of the options you can use when you are using the UDB,

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validation options, these are some tests, there's the smoke test, there's smoke test, cross-validates

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your information, your instruction information against either GCC, L-L-V-M, or RIS-5

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obcodes, this is quite handy to know you're not generating a faulty output, and then you can see

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you can generate really wide source of outputs, and you can even stop the UDB at a certain process

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of the framework, so if you want to take its data as input, you can choose whatever format

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you want or prefer, and on the output, you'll be able to generate documents, you'll be able to

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generate an instruction set simulator, and some raw data, but what does this really looks like?

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So on the manuals, you'll be able to generate the ISO manual, this is pretty much a mirror of what

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the ISO manual has in, it will have some extra indexes that you also can generate, but all these

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documents will have them, which can quite handy. Certification documents are something that is already

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being used, if you want to certify proper, if you want to have a certification required document,

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I'll show this on the next step of this presentation, these are really useful coming from the UDB.

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Profile manuals, as I explained, are the only the ISO manual, but trimmed down for a subset,

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and extension manuals, you can generate the manual for only one extension, if you may want just to study

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for some sort of purpose. Then you have your detailed indexes, this specify instructions,

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extensions, and CSRs, this is quite handy, and doesn't really exist anywhere else in the risk

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of a ecosystem, so whenever you're trying to fetch information for an instruction, you can just

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come here, do a quick search, and you'll find it's way easier. Then, with five upgots output,

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with five upgots has several tools that rely on it, the most known one is spike,

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the simulator, and you can generate this same output set of the UDB already, and then you have

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an instructions that simulator that I'll demo in the next slide. For this demonstration, I'll just

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go back to my computer view, if, yeah, and I'll go over the manuals. If you come here, you'll see

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that the main, this is basically the mirror for the ISO manual, this comes in an HTML version,

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you can see you have and privileged and privileged, nothing really to see here, it's just falls

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really the structure of the ISO manual that is already followed. Then you go into the indexes,

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and here it comes the kind of the delta of the unified database, if you search for an instruction,

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you'll find it's detail, if you want to look for it's encoding, if you may want to look for

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where, which mold you can access it from, it's decode variables, and then you'll even have some

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ideal that you can read from or some soil. And yeah, this exists for the thousand-place instructions

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in risk five. Although some of them do not have fully completed the descriptions, so we'll see that

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here we have no synopsis available for this specific instruction. Well, this is a working progress

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to fill them in. Then you'll have the same for your CSIres, but in their format as I previously

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explained, so you'll have basically this is a table to show the different mold you can access,

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and how it behaves, how it should behave. You'll have it's attributes, in this case, again,

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it's a counter, so only the counter in the format, and then you'll have the field summary,

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fields, and you're software with that you can test the CSIres. Moreover, you'll have a list of

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extensions, and these extensions are all the risk five ratified extensions, you may just

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quickly go and search through them to understand. At the bottom, there is a really nice index,

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you basically can see what instructions each extension adds, and this is quite handy.

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Well, then you have your list of parameters. I'll skip this because this is a bit more specific

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to your needs, if you want to go looking to the UDB afterwards, I think it's pretty easy,

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understandable also. So now, how is the beauty of the UDB? It's really easy to generate

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specific manuals. This one is the base integer, IS, IS. So it's basically Rv32 or 64, I, and here

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you'll only see, are I extension related content. You'll have a brief description, and then you'll

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be able to see all the instructions and more and all the rest of the information that you'll need

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for the I extension. Again, if you're trying to build a profile, you can also build a profile release.

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As you can see, this has way different sizes depending on which profile you have. Rv32 has

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425 pages, but well, it gets way bigger on newer profiles that define a lot more things.

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And truly the only thing you'll need to build one output, or the other, is to specify a different

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config, and your be all good to go. Again, there are a couple more outputs that are interesting.

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As I mentioned, this is a certification requirement document that is generated out of the UDB.

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Rv5 has a working group that is the certification and steering committee, and they create

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certifications, so that Rv5 implementations need to follow, so that they can get Rv5 international approval.

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They are to approve that they are indeed fully compliant with Rv5.

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Well, here you'll have it for the MC132. This is one of the configs they do. They also are doing it for

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the MC364, and they are describing all of these inside the unified database and generating the

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outputs out of it directly. Then, synopsis is also using the unified database to create their

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manuals. This is a snippet of an index of instructions. This will be a different view from what you

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have seen before. And Qualcomm is also defining a new extension, a Qualcomm microC extension, on the UDB.

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It's fully open source, but you'll only be able to look at it at least for now from the UDB.

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This now goes on version 0.7, I believe. Moreover, the ISS that I talked to you about,

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it's really, really simple, and just to demonstrate the potentials of the UDB and how you can use it for

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a source of truth. So, you can see here that you can generate and run some code. That you can run

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some code. This is a pre-built binary from Eballiv with five tests. Basically, the intent and

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fee of this code is to ensure that the AI instruction is executing correctly. As you'll see,

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you have simply a basic problem counter. The goal thing you can find at that memory location

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and what instruction it represents. At the end, you'll see a pass message to tell you that your

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test is passed, because this is what the binary does at the first hand. Now, back to the presentation.

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So, back to the presentation. We'll see just when more output, this is the RIS5 output output.

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So, what I'll show here is the Neville end of RIS5 outputs. The RIS5 output generates a JSON from which

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it arrives all its outputs, and its JSON looks like this, but this one is generated from the UDB as a source of

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information. It can also generate all the other outputs for different use cases. As I said,

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in coding.h is used by spike instructions. Go is used by the goal language, and well,

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there are many other use cases for these outputs. Now, how does the UDB relates to the current

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challenges that I started this talk with? So, it can see instances through all different documents

23:28.300 --> 23:34.140
that sometimes appeared. Well, all these documents that you just saw are built from the same source.

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So, you won't ever find an inconsistency, because they indeed are the same information represented

23:39.980 --> 23:47.340
in different ways. Information not being referenced, that also will not happen in the UDB, the

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built system, or else stagging, and you'll easily find your information inside those manuals.

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Then, creating CPU stock implementation requires copy-pasting DIS. Well, not anymore. If you use the

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UDB, you'll be able to just create a config of your CPU and from that, you'll have the documentation

24:06.540 --> 24:11.900
that you'll need. Again, the moreover, current information not being machine readable, as I

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showed you, UDB comes with a nice YAML format, and that is totally machine readable, and

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parts of all in many ways, you can try to do so. And no reliable solution to create a

24:23.660 --> 24:30.860
alert documentation. Well, I think I've clearly provided the answer for this as the UDB creates

24:30.860 --> 24:37.740
this alert documentation. Now, what does the UDB not solve? Because, well, the UDB is not here to solve

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every problems, although we'd like to. The UDB is not meant to describe full SOC, so not as the

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peripherals that you may see will not be available in the UDB, only CPU information. And current

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roadblocks, copy-pasting is a chicane and egg problem, so the UDB is copy-pasted, and information

24:56.460 --> 25:03.260
is not verified by a lot of people. And information is not verified by a lot of people due to the

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UDB team not being huge at this time. Well, I quickly rushed through this slide, because I thought

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I was out of time, but I'll go back to it. There is still pros, and that pros will not be verified,

25:18.380 --> 25:24.060
although all the rest of the information can be well, you can't really verify text in any way.

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And well, there are, if there is information missing, in some of the new outputs, the UDB

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generates, that's because we can't really fetch it from anywhere. I showed you on the index,

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there will some blank fields. Now, use cases. So, I've mentioned a few of these use cases,

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like the certifications to become a TSIG, is using it to create the CRDs. The welcome has created

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an extension, that is only described and available through the UDB as of now.

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So, nobts is using it to generate arc-5 processors documentation. It can substitute risk-5

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obcodes if at some point that is required. And it can provide content for all the new tools or

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documents that you may find with your creativity to use it for. Future work. Well,

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future steps are vendors and consumers relying on the UDB to create their documentation.

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Even if you have some issues, some CPUs that you don't have really good documentation for,

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you can do the test, you can go into the UDB and generate your own documentation.

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New tools can be live on the UDB and you can specify your eyes and peripherals there,

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maybe, in the future. So, the UDB and goal. The UDB and goal is to become the main source of

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information for the risk-5. We hope that happens, but currently we're working to do it.

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Call for help. So, before finishing this presentation, the UDB is already being developed

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collaboratively. There are several engineers from a whole different companies like

27:00.620 --> 27:08.700
Akiana, Qualcomm, Reval, SIF-5, Synopsis, and Ventania, but we need more help. We need a community

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to help us. If you're interested in this, please join us. Check our GitHub repository,

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check all the issues and discussions that are currently going on. You can also join our weekly meetings.

27:21.260 --> 27:29.820
Although there is no formal SIG yet, it might happen soon. So, yeah, for now, contact me and I'll

27:29.820 --> 27:35.020
invite you to this weekly meetings. Finally, if you're really really interested in Synopsis,

27:35.020 --> 27:41.340
hiring someone to work on the UDB. So, yeah, contact me if interested or check the QR code.

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Thank you.

