WEBVTT

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Okay, so the first speaker is EML from canonical and he'll be talking about risk

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five hardware where we're at.

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Welcome.

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Thank you.

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All right, yeah.

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So I thought I'll start out the day by not so technical talk, but just like introducing

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you to what hardware can we actually buy right now.

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As I began set, I'm EML.

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I'm a kernel engineer at canonical and I do the risk five kernels for Ubuntu.

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So in order to understand this landscape of what hardware we can buy, I think it's important

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to understand three constants.

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The first is the core.

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That's the actual logic that looks at the risk five instructions and sort of run

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the program.

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That's the suck.

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That's the chip you need.

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It's a physical thing.

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You know, the scent that can compute.

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And then the board is the green plate that you also need.

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So let me just go through this and talk a bit about what I mean.

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So the core usually written in a very lock.

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It's kind of like programming, but also not.

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It's a design, not a program.

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You can see example of a bit of a very lock at the side there.

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Yeah, so that's a piece of logic that runs your code.

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And this is where you can do like faster slower designs or smaller bigger designs

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depending on how you should stuff.

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Then you need the actual chip.

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These days we put more than just the core on the chip.

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So we call it a system on the chip because you see the yellow boxes up there.

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That's the actual course.

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But at the side there's lots of all the stuff.

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Peripherals like you'd need for Ethernet, USB, MNC.

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You also need like clock trees and a memory controller so you can have external RAM.

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You need lots of stuff inside of the stock.

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And all of those peripherals you can usually buy from different vendors so you can piece together your own suck.

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Kind of like in the old days you would buy a network car and a graphics car and an ID controller.

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Just on a very small scale.

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Lastly you need the actual board because like the stock can't run anything on itself.

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It needs like crystals for timekeeping.

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It needs different power levels.

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It needs something called decoupling.

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It needs the external RAM.

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It needs files to translate between the digital world world inside the chip and what you actually send on the wire.

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It needs connectors so you can plug in your USB stick into something.

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And they can be small like one at the top.

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That's like a Raspberry Pi size.

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Or they can be big and put into like a cabinet so you have something that looks like a real computer.

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But I think it's important to understand all these three things in the when I go forward.

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Because I'll just go and here this part I have two minutes light so try to make this quickly.

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So in the beginning there was sci-fi.

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And that's basically started by professors and PhD students from Berkeley where the risk five instruction set originates.

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And one thing that's important to understand about them is that they're not in the business of selling chips or bots.

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So what they really want to sell is just the design.

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The core I was talking about but also other stuff.

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So in 2018 I think it was announced here at first.

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They made the list on least board and as you can see they designed the core.

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They produced the chip and they also produced the board.

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And the reason they did that even though what they really want to sell is just the top part they call.

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This is like a tech demo to show the world this works and it does work.

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I mean I have one at home and it runs.

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That's so fast for the ones.

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It's also like a very simple chip.

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It only has like an even that controller that's fast everything else is super simple.

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Anyway, they actually did sell this core to for example micro chip.

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I'm sure it's a bit company you might know it.

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And here you can see it gets a little more interesting.

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You see the sci-fi design the core sold it's a micro chip who produced the chip.

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And then they also created their own isolated kit.

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But a lot of other companies made boards with this.

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And I mean it's a nice chip.

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If what it is it's an FPGA with some display cores on the side.

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And it's good for that but you probably wouldn't buy it to just for the cores.

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Because they're like the first generation of sci-fi cores and they're fast.

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But they work.

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They can run. In fact, it's a support a quite well upstream in Linux.

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And that's also why you see bigger boarding in 2023.

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A bigger board made the bigger we fire with this chip.

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But wrong way.

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Okay, two years later there's like the second generation of tech demo from sci-fi.

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And as you see again they made on three parts.

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They suck in the board. And of course a new core.

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They wanted to demo.

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But something interesting happened here.

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There's a Chinese company.

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Stuff five who also produced a their own chip.

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But with the same core.

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This was like a test chip for the upcoming product.

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The next chip.

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And it's the slices of a little misleading.

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Because actually the starlight board over there was first.

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There was like 800 out of them.

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I was lucky to get one of them.

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And then unfortunately a big board and see two people.

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And stuff I broke up.

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So stuff I produced is later their own board.

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There's like 3,000 of those.

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Yes.

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Fast.

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So what stuff?

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They didn't come out of nothing.

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Since I was actually started as sci-fi sort of Chinese branch.

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But they're now independent and designing their own course.

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But to give them credit,

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the Chinese vendor that actually has the most upstream present.

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Which I think is nice.

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Because a lot of other Chinese vendors are good actually.

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But they're not the only Chinese player.

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There's a, a little Baba have a like a design team.

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And they did something quite interesting.

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They not only did they produce course like sci-fi.

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They also put them out on GitHub.

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They're the shanty course.

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I don't know if I should call them home source.

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But at least you can go go look at some of the very locked on them.

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And then it got really interesting.

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Because then you can see.

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Now all winner took those small fancy course.

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Put them on a chip.

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And then lots of other Chinese companies produce course with them.

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That's why they dot something.

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There's plenty of other things.

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These are some of the examples that are quite well supported.

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Obviously.

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And another important that I want to mention.

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Just to show that it's not only tea head and sci-fi course.

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It was there.

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Was this.

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There's another.

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It's a Taiwanese company and it's who.

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They actually sell a lot of like mic control of course.

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But they also do logic course.

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They can run Linux.

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Sold them to run.

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They usually do like automotive arm sucks.

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But they also did this part.

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And I was really hoping for this.

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But unfortunately it has a box.

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So it can run.

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You need to compile the whole user space to work around this box.

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Which is a bummer.

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Because that means we can't run a bunch on this.

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Like the other box you saw.

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We have a bunch of images for them.

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We can't have a one for this one because it has a box.

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But I mean it is supported upstream in Linux.

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Which is nice.

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One way again.

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Then.

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Here we go.

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2022.

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Finally stuff.

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I released the real chip.

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Not just the test chip.

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And this is like.

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This is what I would recommend.

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If you just want something easy.

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Something that works.

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We have plenty of images.

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Those for like different digitals.

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Wouldn't to include it.

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Get the vision five or the mass board from the five.

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But you can see there are lots of other boards up there.

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I think actually now the start 64.

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It also has a device tree upstream.

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So you can run upstream.

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Kind of some of these boards.

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And it's super easy.

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Good images for all the research.

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If you want.

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Basically.

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And.

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But I mean just.

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Expect the recipe.

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Buy three.

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It's sweet.

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It's not like they're super fast.

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But.

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For most of them you can actually attach them in your need drive.

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So they have proper storage.

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Which is nice.

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Later.

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23.

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There's.

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Now you can see actually.

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He had they produced their own suck with.

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A little a little faster call.

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Uh.

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My impression is that they needed this suck to do android porting.

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But.

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In any case, they sold it to a lot of other.

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Um.

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Companies that makes boards for this.

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And.

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There's a little scale way.

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Uh.

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Logo down here.

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And that's because.

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Uh.

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I don't know if you've seen scale ways of French hosting provider.

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You can buy virtual.

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Which five machines from them or actually real hardware.

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And the real hardware is this chip.

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Um.

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I would not be surprised if they just bought a bunch of those.

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Uh.

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Did you buy a cluster for a that you see just above their logo.

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But I don't know.

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It's.

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It's this chip.

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At least.

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And then.

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Ha ha.

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They're planning you might've seen this.

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It's the best.

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So it has 64 goes and that's again, the.

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The T hit course.

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Uh.

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And a lot of memory.

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And, uh.

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Uh.

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I think I saw the PCI driver getting up to in town.

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So maybe soon you can run upstream on it and actually use it.

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But this is still your best bet if you just want to.

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Compile GCC or the kernel.

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Basically it's well.

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It's.

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Probably get it done fast.

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But.

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Uh.

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see later those first generation of T-head course, they are first generation.

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But here is the second generation, where they actually have the real, ratified version of

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vectors.

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So in 2013, it came also this little boat that was popular for a short while when this

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was the only boat you can get with the vector in hardware.

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So you can actually test your crypto, decoding, audio, video decoding with the vector extensions.

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But it's very small and it doesn't have a lot of RAM.

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So luckily later came this boat.

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To me unknown, Chinese company called SpaceMit, with apparently their own core.

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And they produce two different versions of the chip, I think it's the same, just one

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of them, can be run a bit faster.

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And then again, lots of other companies did possible then.

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And later you'll hear from youening, from T computing, who also did like the second

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laptop with the chip.

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This core, I've been told that they started with the T-head course and then sort of developed

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from that.

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But it's not something I know for certain.

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Yeah, this is also the air where we got our first sort of hardware bug with the logo.

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And by now I hope you will be able to see that when it says down here, breaks in secret

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of T-head with 5 CPU.

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What they mean is that it's a bug in those T-head course.

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So now you lot to be able to understand why this affects a chip from all women, a chip

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from soft go and their own chip.

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But does not have anything to do with like a broken with 5-spec or any other broken CPUs.

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All right.

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And then, then we are to this year, it's sci-fi's latest sort of tech demo.

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But this time they didn't produce their chip themselves, they had a deal with the Chinese

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company S1 who produced this EIC and 770, and they are producing their high-five premium

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P550.

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This is still the earlier days.

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It has an abunter image, but the code for it is unfortunately not quite upstream yet.

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And maybe in grey you can see that there's been announcements of all our bots with the

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same chip in the future.

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So that's my quick rundown of all the hardware we can buy right now.

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And for most of them, at least all the ones that are upstream support, they are of course

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going to images.

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I promise to say this.

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So looking forward, one thing I'm looking forward to is, and this is trying again.

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This time with their own chip, and they also have their own bot.

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And there's also been announcements from deep computing that they might be doing something

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with this chip.

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So I'm looking forward to this.

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Just because it's not like a T-head or a sci-fi call, it's something new.

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Then they of course, the known players, Ventana and Reboos, they do a lot of upstream work

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so when they finally release their hardware, I'm sure it's going to be great.

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But when it happens, I don't want to guess.

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And then there's also a few companies that do like PCI cards with a lot, a little, a

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risk-fi calls on it for like AI and accelerating stuff.

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And I'm sure both of them are thinking about making like a big risk-fi calls, so it can

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be like a standalone server.

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But when it's going to happen, also, your guess is, as good as mine.

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And then, lastly, something I'm looking forward to is that the Chinese Academy of Sciences

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is actually developing what they say is an open source, high performance risk-fi process

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at the Shanghai.

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And I boomers tells me that it's about ready to be taped out, so for something that

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you can actually buy and not just for testing.

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So I'm looking forward to see how it will perform when it's taken.

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Again, you can search for Shanghai and we'll find like this page and links to GitHub and

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you can go look at the Urla code action.

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That's it.

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Did I make it inside?

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I can't plan till time.

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Because then I have like a little bonus page here with the last one.

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Yes, questions.

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So did I see that correctly that the most recent non-Chinese course were just micro-ship

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and renasas?

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No, of course.

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Of course, from sci-fi, but chips.

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Ah, sorry.

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The socks.

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Yeah.

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Yeah, that's right.

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So there is, so currently there are no non-Chinese chip vendors for risk-fifx chips.

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Yeah, there's only micro-ship.

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All right.

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Yeah.

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And I think actually they did announce that at least they did announce that they won a bit

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for creating space chips from NASA.

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So they will be producing more risk-fifx chips in the future.

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Yes.

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So thank you first of all for the great presentation overview.

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Just want to check.

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So the vector extension, I can find on the K 230 that you said, but is it 0.7 or 1.0?

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That's right.

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So when I said the first generation T-head, they had the 0.7 vector extensions and

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they were a little, I guess they were, yeah, are we really going to update our GCC and

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write all that code?

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It's been done eventually to support this because it's only those courses have the

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0.7.

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Everything else you'd be using 1.2.

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Where was it?

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So this one has the vector 1.0.

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It's, yeah, it doesn't have a lot of RAM and it's not very fast, but it has the vectors.

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But then the space midship also has vectors 1.0 and you can write it.

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And the p5.0 from sci-fi?

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I don't think it has the vector, no unfortunately.

17:28.960 --> 17:32.960
And do you know it has the hypervisor extension?

17:32.960 --> 17:38.960
It does, but they are, it's not advertised because they are not completely to speak.

17:38.960 --> 17:41.960
From the software side, it's not in a window.

17:41.960 --> 17:46.960
So my colleague Heinlek has actually run QMU and have it accelerated.

17:46.960 --> 17:52.960
And for what it tells me it works, but sci-fi tells me that there's something in the hardware

17:52.960 --> 17:54.960
that that's not quite right.

17:54.960 --> 18:00.960
And maybe it's something that can be worked around in software, but I'm not exactly sure about the details yet.

18:00.960 --> 18:01.960
Thank you.

18:02.960 --> 18:15.960
Thank you for the nice overview.

18:15.960 --> 18:22.960
I have a quick question just judging a lot of the companies involved, our Chinese,

18:22.960 --> 18:29.960
is getting sanctioned by being put on the US entity list, actually a concern or a house that happened.

18:29.960 --> 18:30.960
Yes, it is.

18:31.960 --> 18:37.960
What's the risk involved?

18:37.960 --> 18:38.960
Yeah.

18:38.960 --> 18:42.960
So this company is a Chinese company.

18:42.960 --> 18:45.960
They used to do Bitcoin miners and stuff.

18:45.960 --> 18:52.960
And I'm sure they had lots of other projects planned for other RISP-5 SOCs.

18:52.960 --> 18:59.960
Unfortunately, they have been caught with some of their ships on Huawei hardware.

18:59.960 --> 19:02.960
So now they've been put on the sanctioned list.

19:02.960 --> 19:06.960
So they can't similar to how Huawei can't use TSMC,

19:06.960 --> 19:08.960
software can't use TSMC any longer.

19:08.960 --> 19:10.960
So now they have a big problem.

19:10.960 --> 19:11.960
So yeah.

19:11.960 --> 19:16.960
That's unfortunate.

19:16.960 --> 19:22.960
How is the peripheral support and the bugs you showed?

19:22.960 --> 19:27.960
For this one I recommend this one.

19:27.960 --> 19:30.960
It's quite good except for graphics.

19:30.960 --> 19:34.960
Nothing has graphics upstream yet.

19:34.960 --> 19:38.960
So that's also why in my quick.

19:38.960 --> 19:42.960
This one I was saying, I want graphics good luck.

19:42.960 --> 19:48.960
Because if it's not, you need to use the vendor kernel or what you can do is get something like

19:48.960 --> 19:51.960
the on-match spot, which has a really nice PCI driver.

19:51.960 --> 19:54.960
So you can actually just block in an old region card.

19:54.960 --> 19:58.960
And then you get like a problem with this stuff.

19:58.960 --> 20:03.960
What is the state of support in operating systems other than Linux?

20:03.960 --> 20:06.960
Do you have any knowledge of that?

20:06.960 --> 20:08.960
No, I don't know if Jessica's.

20:08.960 --> 20:10.960
She knows about freebies.

20:10.960 --> 20:14.960
I'm sure they also support quite a lot of these tips.

20:19.960 --> 20:21.960
You mentioned for graphics, you can old radion.

20:21.960 --> 20:23.960
Why an old radion?

20:23.960 --> 20:24.960
Sorry.

20:24.960 --> 20:28.960
What I meant was just any PCI card with like an open source driver.

20:28.960 --> 20:29.960
It should work.

20:41.960 --> 20:43.960
No more questions?

20:43.960 --> 20:44.960
Okay.

20:44.960 --> 20:45.960
Sorry.

20:45.960 --> 20:54.960
Have any of the major big free cloud computing providers expressed interest in the risk

20:54.960 --> 20:55.960
of all?

20:55.960 --> 20:58.960
Like Amazon, Google and Microsoft?

20:58.960 --> 21:05.960
I'm sure they're looking at it, but not like anything they said publicly that I know of.

21:05.960 --> 21:09.960
Google has in their Chromebooks.

21:09.960 --> 21:12.960
They have like a security chip.

21:12.960 --> 21:15.960
But that's a microcontroller size chip.

21:15.960 --> 21:20.960
So that actually runs with five.

21:20.960 --> 21:21.960
Not yet.

21:21.960 --> 21:27.960
But I'm sure Reboos and Ventana and Tinstone and they're like,

21:27.960 --> 21:30.960
a lot of companies will want to sell them that.

21:30.960 --> 21:33.960
Once they're ready.

21:33.960 --> 21:36.960
This is a question down here.

21:42.960 --> 21:56.960
So looking at the socks and the additional peripherals.

21:56.960 --> 22:02.960
Are there repositories with open source peripherals in them as well?

22:02.960 --> 22:07.960
Are they located on different dice in most socks?

22:07.960 --> 22:09.960
They're on the same die.

22:09.960 --> 22:14.960
There are also repose with open source peripherals.

22:14.960 --> 22:16.960
So there is a product.

22:16.960 --> 22:25.960
Unfortunately, I forgot it's name, but there is like a product that's some.

22:25.960 --> 22:30.960
A bunch of Python code that will take these designs from different open source.

22:30.960 --> 22:34.960
And then it will like combine it all into one sock.

22:34.960 --> 22:36.960
They have like a risk call.

22:37.960 --> 22:39.960
That's the one I was thinking about.

22:39.960 --> 22:40.960
Okay.

22:40.960 --> 22:41.960
Okay.

22:41.960 --> 22:45.960
But then I have a design for my own chip that I could tape out if I had like a million dollars too much.

22:45.960 --> 22:46.960
That's right.

22:46.960 --> 22:47.960
Yeah.

22:47.960 --> 22:50.960
Is there a, I mean, really great salt?

22:50.960 --> 22:56.960
Because like what happens when you have your open source design and you go to have it manufactured,

22:56.960 --> 23:01.960
then they will say, oh wait a minute, you actually need to connect all your digital logic to the outside world.

23:01.960 --> 23:06.960
And then you need like a lot of analog stuff that's particular to the process they're using.

23:06.960 --> 23:11.960
And you need to buy that from us and that's completely closed because it's part of their process.

23:11.960 --> 23:26.960
So what is your personal impression on, let's say, hidden vulnerabilities in all of that stuff that you buy adjacent to the actual chip?

23:26.960 --> 23:33.960
I mean, one of the concerns or one of the, one of the reasons that some people have to use risk five are obviously security concerns.

23:33.960 --> 23:41.960
But if I have to buy additional hardware that it's connected to, what does that mean for you?

23:41.960 --> 23:48.960
There's like I called Bonne-Hwang who has a project where he has like a super secure phone.

23:48.960 --> 23:55.960
And he has thought a lot about this sort of security of how can we actually verify that the chips that we,

23:55.960 --> 23:59.960
that we run stuff on actually does what we, what we thought they did.

23:59.960 --> 24:04.960
So what he's done is that he's actually running most of it on an FPGA,

24:04.960 --> 24:11.960
because then it's harder to hide stuff because he can, like they don't know how you dynamically reprogram the FPGA.

24:11.960 --> 24:16.960
So yeah, look up what's the project called with the phone he's making.

24:16.960 --> 24:20.960
I forget. But yeah, Bonne-Hwang, look at that.

24:21.960 --> 24:22.960
Thanks.

24:22.960 --> 24:25.960
Yeah, and I should comment on this.

24:25.960 --> 24:28.960
You know, I'm not the chip designer and I'm starting to get involved with this.

24:28.960 --> 24:34.960
But the designs that we've got that open hardware foundation are fully documented and verified,

24:34.960 --> 24:38.960
at least, you know, for the cores themselves and we've got the microcontroller.

24:38.960 --> 24:45.960
So not Linux class, but that particular macrocontroller as per the shells that are part of it.

24:45.960 --> 24:50.960
But the full set once again, you will have to deal with whatever foundry, you know,

24:50.960 --> 24:57.960
but so maybe you should have a look if you have concerns about things being open and verified at the same time.

24:57.960 --> 25:03.960
I think, yeah.

25:03.960 --> 25:10.960
An openness is a fairly a question, but you have shown a lot of course on the higher end.

25:10.960 --> 25:15.960
Yes, the lower end, the second generation, the second generation,

25:15.960 --> 25:18.960
the second generation, the second generation, the second generation.

25:18.960 --> 25:20.960
That's right.

25:20.960 --> 25:21.960
That's right.

25:21.960 --> 25:23.960
Yeah, I forgot that disclaimer in the beginning.

25:23.960 --> 25:28.960
I do Linux from my data up, so my view is good to what the stuff that can run Linux.

25:28.960 --> 25:34.960
But it's a whole host of the microcontrollers that also run this file that you can buy.

25:34.960 --> 25:38.960
And it's a really nice, and it's a whole talk on its own.

25:40.960 --> 25:53.960
Yes, and all that out there.

25:53.960 --> 25:59.960
So the question was, yeah, what about the early boot process, I think,

25:59.960 --> 26:02.960
and then like the firmware that runs before we get to Linux?

26:03.960 --> 26:12.960
For now, it's very similar to onboard, so usually they would want you boot.

26:12.960 --> 26:19.960
Even the day is 71-10, even has like the really early boot where it sets up RAM time in

26:19.960 --> 26:21.960
since stuff upstream.

26:21.960 --> 26:28.960
So you basically just run upstream you boot on these stuff, I've chips.

26:28.960 --> 26:33.960
And then you need a component called OpenSBI for technical reasons.

26:33.960 --> 26:41.960
That's also open source, and that's basically it.

26:41.960 --> 26:49.960
Yeah, kind of off topic question, you have a core, you have all digital design,

26:49.960 --> 26:55.960
a lot of analog periphery, when it comes to manufacturing,

26:55.960 --> 27:01.960
how to produce your chips, and how this is financed.

27:01.960 --> 27:03.960
That's a good, who actually produces them?

27:03.960 --> 27:08.960
I think mostly TSMC these days, but I may be wrong, maybe.

27:08.960 --> 27:12.960
Well, at least for some of the designs we've got at OpenSBI Foundation,

27:12.960 --> 27:16.960
we worked with local fondries on getting actual physical chips.

27:16.960 --> 27:20.960
So there's a variety of vendors, but I'm no expert either, so that's anyway.

27:20.960 --> 27:24.960
There's a variety of...

27:24.960 --> 27:29.960
No, in that case it was, I think, in Taiwan?

27:29.960 --> 27:30.960
Yeah.

27:30.960 --> 27:35.960
But it's a question of financing this.

27:35.960 --> 27:41.960
So the financial support comes from foundation, from risk violation,

27:41.960 --> 27:44.960
because you have to pay for it.

27:44.960 --> 27:49.960
Yeah, well, I don't think that the risk violation would bankrupt you

27:49.960 --> 27:53.960
if you were to add chips made, but if you're an academic,

27:53.960 --> 27:57.960
or things like that, then university professors will be able to get a ride

27:57.960 --> 28:01.960
on not fully complete wifers and things like that.

28:01.960 --> 28:05.960
In our case, at OpenSBI Foundation, we had the same kind of deal,

28:05.960 --> 28:11.960
so we had maybe a limited round of 200 chips made from our microcontroller,

28:11.960 --> 28:15.960
and then we discovered there was a short unit, those things happen.

28:15.960 --> 28:20.960
But apart from that, I mean, if you're really in the commercial world,

28:20.960 --> 28:26.960
or trying to get things done yourself, you won't get subsidies for anyone for that,

28:26.960 --> 28:29.960
because manufacturing is quite expensive.

28:29.960 --> 28:36.960
Yes, it's really expensive, and you have to commit, of course,

28:36.960 --> 28:41.960
to use the tooling that they prefer at that particular fundry

28:41.960 --> 28:44.960
and work with the effort for all, so it's not to.

28:57.960 --> 29:00.960
You're baking the kernels for a punter, right?

29:00.960 --> 29:01.960
That's right.

29:01.960 --> 29:04.960
What's special about a risk fight kernel?

29:04.960 --> 29:09.960
So I am sometimes a little more lenient in that I just want to have,

29:09.960 --> 29:14.960
like, about working, so sometimes they take patches before they are fully accepted

29:14.960 --> 29:21.960
upstream, and then other than that, it's just that I re-base of all of the security

29:21.960 --> 29:24.960
patching that goes on and made a bunch of kernels.

29:24.960 --> 29:27.960
So it's pretty much vanilla.

29:27.960 --> 29:31.960
You can pretty much use a vanilla kernel on risk fight.

29:31.960 --> 29:32.960
Oh yeah, yeah.

29:35.960 --> 29:39.960
I mean, depending on the board, right, when for the staff of the board,

29:39.960 --> 29:44.960
yes, and for the two early sci-fi boards, definitely yes,

29:44.960 --> 29:48.960
and the microchip board, and also the all-winner D1,

29:48.960 --> 29:50.960
also works reasonably well.

29:50.960 --> 29:54.960
I have some extra patches that it's not quite upstream yet,

29:54.960 --> 29:57.960
but yeah, for the early board, yes.

29:57.960 --> 30:01.960
What do you use for daily driver and why?

30:01.960 --> 30:09.960
I am. So I also use the staff of the board, so that's just the staff of the board,

30:09.960 --> 30:15.960
the vision-5-2, and I have a milk mask board that I actually use as a jump post in my

30:15.960 --> 30:17.960
Hacker space.

30:17.960 --> 30:18.960
Yeah.

30:18.960 --> 30:19.960
Hi.

30:19.960 --> 30:23.960
Do you have any timeline on the space mid boards,

30:23.960 --> 30:26.960
like when they're going to go upstream?

30:26.960 --> 30:29.960
Because currently they're on that PMB kernel, right?

30:29.960 --> 30:30.960
That's right.

30:30.960 --> 30:31.960
Yeah.

30:31.960 --> 30:36.960
But I forget his name, but DLAN, he's called online,

30:36.960 --> 30:38.960
is working on an upstream again.

30:38.960 --> 30:46.960
And I think they're in, in, when I was short while,

30:46.960 --> 30:52.960
they will have enough that you can run from the onboard EMMC upstream.

30:52.960 --> 30:56.960
I don't think that will take many releases.

30:57.960 --> 31:00.960
But of course, no graphics or anything like that.

31:00.960 --> 31:05.960
So this is more of a ecosystem, I guess,

31:05.960 --> 31:09.960
question. On arm, you have applications like box 86.

31:09.960 --> 31:12.960
What's the situation for running proprietary software,

31:12.960 --> 31:15.960
meant for other architectures on risk-5?

31:15.960 --> 31:18.960
Is there any, like, recompiler emulator like this or not, not really?

31:18.960 --> 31:22.960
Oh, you should ask my colleague, I'm like, you will know all about this.

31:22.960 --> 31:25.960
It does box 86, not have a risk-5 port.

31:25.960 --> 31:29.960
I think there's some, some emulator that does have a risk-5 port.

31:29.960 --> 31:31.960
Yeah.

31:36.960 --> 31:41.960
So when you're building a kernel for a specific sock,

31:41.960 --> 31:45.960
you obviously need something like the device tree overlay

31:45.960 --> 31:47.960
to, to build that correctly.

31:47.960 --> 31:54.960
But how different are the course themselves and what are

31:54.960 --> 31:56.960
the customization points that you have to take into account

31:56.960 --> 31:59.960
when you're building the kernel, when you're, when you're preparing

31:59.960 --> 32:01.960
the kernel to build?

32:01.960 --> 32:06.960
So the little kernel is quite good at sort of patching itself,

32:06.960 --> 32:10.960
once it boots. For example, the first generation T-head course,

32:10.960 --> 32:16.960
they use some bits in the page table in a different way

32:16.960 --> 32:21.960
from, because they used them before the spec was ready.

32:21.960 --> 32:25.960
So the kernel will sort of patch itself and say,

32:25.960 --> 32:30.960
oh, okay, now I'm running on this tip, so I need to use these functions.

32:30.960 --> 32:32.960
So we build what, the kernel is the same.

32:32.960 --> 32:34.960
The only difference is the device tree.

32:34.960 --> 32:37.960
And then once it boots, it will take on on this platform

32:37.960 --> 32:39.960
and it will patch up itself and run.

32:39.960 --> 32:44.960
Okay, so, so you build the kernel just for an abstract,

32:44.960 --> 32:48.960
I-S-A specification and you don't generate that from the

32:48.960 --> 32:50.960
very little code and then you have to build for.

32:50.960 --> 32:52.960
Oh, no, no, no, no, no, no, no, no, no, no, no.

32:58.960 --> 33:02.960
Yeah, just out of curiosity, as you're going to,

33:02.960 --> 33:05.960
how are the kernels actually built? Are they cross-compiled

33:05.960 --> 33:06.960
in the next CD6 board?

33:06.960 --> 33:10.960
Or is it actually, do you have, like, a risk fee farm or something?

33:10.960 --> 33:12.960
I wish, I wish.

33:12.960 --> 33:15.960
But we do have a policy of sort of dog fooding.

33:15.960 --> 33:18.960
So we are not cross, I mean, I cross-compiled all day for testing.

33:18.960 --> 33:21.960
But when we actually release the kernels, they are built

33:21.960 --> 33:22.960
natively.

33:22.960 --> 33:24.960
But by natively, what I mean is that they're built

33:24.960 --> 33:27.960
inside the QMU and big servers.

33:27.960 --> 33:31.960
Yeah, so that's why I'm really looking forward to

33:31.960 --> 33:36.960
when we can actually have a board that has the

33:36.960 --> 33:40.960
virtualization extensions so we can run like virtual machines

33:40.960 --> 33:43.960
on like risk files servers.

33:43.960 --> 33:46.960
Because, yeah, we need that.

33:46.960 --> 33:49.960
Thanks.

33:49.960 --> 33:54.960
Yes, up here.

33:54.960 --> 33:56.960
Is all the hardware that you showed,

33:56.960 --> 33:59.960
64 bit risk files?

33:59.960 --> 34:02.960
Some of it is 32 bit.

34:02.960 --> 34:06.960
Yes, all the boards up in some in about 64 bits.

34:06.960 --> 34:10.960
And all the distributions you will see are compiled for 64 bit.

34:10.960 --> 34:13.960
I think the N2 may have some experimental

34:13.960 --> 34:16.960
where they can compile for 32 bit.

34:16.960 --> 34:19.960
But usually you would do something like

34:19.960 --> 34:22.960
York to a build route for 32 bit.

34:22.960 --> 34:25.960
So it is not possible to run up on 32 bit?

34:25.960 --> 34:26.960
No.

34:26.960 --> 34:29.960
You only have a 64 bit board.

34:29.960 --> 34:33.960
And by the way, there's one similar to other

34:33.960 --> 34:35.960
and microchip made.

34:35.960 --> 34:38.960
If PDA with some risk files costs,

34:38.960 --> 34:43.960
I've also heard about a Chinese FPDA with some 32 bit

34:43.960 --> 34:45.960
risk files costs in hardware.

34:45.960 --> 34:48.960
It's like, first time I've heard

34:48.960 --> 34:50.960
something you actually put 32 bit.

34:50.960 --> 34:53.960
Demiscapable chip in hardware.

34:53.960 --> 34:57.960
Usually 32 bit Linux is when you have an FPDA.

34:57.960 --> 35:01.960
And you just want to use this little of those gates as possible.

35:02.960 --> 35:07.960
Why do you have this policy of not cross compiling?

35:07.960 --> 35:10.960
So I know it's a hassle, but besides that,

35:10.960 --> 35:11.960
why do you do that?

35:11.960 --> 35:14.960
It's just to make sure that everything can compile itself

35:14.960 --> 35:16.960
and everything works as it should.

35:16.960 --> 35:21.960
You know, two chains and all the stuff.

35:21.960 --> 35:25.960
And just to complete on the 32 bit question,

35:25.960 --> 35:28.960
typically you will find 32 bit designs

35:28.960 --> 35:31.960
and you will find 32 bit support for that.

35:31.960 --> 35:34.960
But that's mostly real time operating systems

35:34.960 --> 35:36.960
like Eclipse, Red X or ZIFI.

35:47.960 --> 35:48.960
Hello.

35:48.960 --> 35:51.960
Great to see someone that might be able to answer my question.

35:51.960 --> 35:54.960
So I got a high five on matched board.

35:55.960 --> 35:58.960
And I downloaded Ubuntu.

35:58.960 --> 36:02.960
And it was with 1.2 gigahertz.

36:02.960 --> 36:05.960
Scale down the CPU frequency.

36:05.960 --> 36:08.960
Do you happen to know why?

36:08.960 --> 36:09.960
No, sorry.

36:09.960 --> 36:11.960
But let's talk afterwards.

36:11.960 --> 36:14.960
Yeah, because it was advertised at 1.4.

36:14.960 --> 36:16.960
I think, and it was coming.

36:16.960 --> 36:17.960
Yeah.

36:17.960 --> 36:19.960
So I had to overclock it.

36:19.960 --> 36:23.960
And documentation was not there.

36:23.960 --> 36:24.960
But I managed it.

36:24.960 --> 36:25.960
But you made a book?

36:25.960 --> 36:26.960
Yeah, yeah.

36:26.960 --> 36:28.960
And it works perfectly at 1.4.

36:28.960 --> 36:29.960
Nice.

36:29.960 --> 36:30.960
Yeah.

36:30.960 --> 36:31.960
I just wanted to know.

36:31.960 --> 36:32.960
Yeah.

36:32.960 --> 36:33.960
Let's talk about that.

36:33.960 --> 36:34.960
Okay.

36:34.960 --> 36:35.960
And another question.

36:35.960 --> 36:38.960
When will it be possible to have just one image?

36:38.960 --> 36:39.960
Yeah.

36:39.960 --> 36:40.960
When will possible to have one image?

36:40.960 --> 36:41.960
Yes.

36:41.960 --> 36:43.960
That's a good question.

36:43.960 --> 36:45.960
So,

36:46.960 --> 36:54.960
close the risk-five foundation has this kind of spec that sort of tells how we're supposed to

36:54.960 --> 36:55.960
to boot.

36:55.960 --> 37:01.960
And it leans heavily on quite similar to what others when they're mandating UEFI.

37:01.960 --> 37:07.960
And then hopefully we can live in a world one day where I know UEFI is not perfect,

37:07.960 --> 37:10.960
but at least it's one standard that everybody can use.

37:10.960 --> 37:14.960
And we can just produce images that expect that they are booted using UEFI.

37:14.960 --> 37:24.960
And you don't have to worry about your boot or what's actually running underneath.

37:24.960 --> 37:35.960
Right now there is still, we still need some work to get the information from the UEFI

37:35.960 --> 37:41.960
environment into actually choosing the right device to a boot time.

37:41.960 --> 37:46.960
But that's just a technique I see that we should be able to solve.

37:46.960 --> 37:51.960
But I mean people are working on the same problems in the model.

37:51.960 --> 37:53.960
So we'll probably just slip steam on that.

37:53.960 --> 37:58.960
Yeah, that would be great because also for the maintainers of the OS.

37:58.960 --> 37:59.960
Really bad thing.

37:59.960 --> 38:01.960
And another last question.

38:01.960 --> 38:05.960
The high-five premier P550.

38:05.960 --> 38:08.960
I saw that it has the H extensions.

38:08.960 --> 38:09.960
Yes.

38:09.960 --> 38:11.960
That's it to work.

38:11.960 --> 38:12.960
Yeah.

38:12.960 --> 38:14.960
So that's what I was talking about earlier.

38:14.960 --> 38:18.960
My colleague has tried it out and he got it working.

38:18.960 --> 38:25.960
But it's not really advertised because I'm told that there is some slight hardware issues

38:25.960 --> 38:29.960
where it's not quite up to the final spec.

38:29.960 --> 38:35.960
So maybe we need some software work around or maybe it's not possible.

38:35.960 --> 38:39.960
And not exactly sure the state is, but you can make it work at least.

38:39.960 --> 38:45.960
Yeah, I saw a lot both by 3BSD team with the D-Hive that also made it work somewhere.

38:45.960 --> 38:46.960
Yeah.

38:46.960 --> 38:47.960
Okay.

38:47.960 --> 38:50.960
Looking forward to see something that has gave them enabled.

38:50.960 --> 38:52.960
Yes, me too.

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Thanks.

38:54.960 --> 39:00.960
What question based on your personal experience?

39:00.960 --> 39:06.960
So I've seen comments from Qualcomm because it was like that asked for our ISR changes

39:06.960 --> 39:09.960
to build more micro architectural efficient prefetchers.

39:09.960 --> 39:12.960
I guess it was limiting the variance of instruction length.

39:12.960 --> 39:18.960
So you as a software guy did you also come up with some things you found awkward in the ISR specification

39:18.960 --> 39:22.960
that yeah, if you change it like that and that I might have an easier life

39:22.960 --> 39:28.960
or it would be much easier to get you to Linux and channel running.

39:28.960 --> 39:31.960
Not really.

39:31.960 --> 39:41.960
Not something that's not been discussed to many times before and where my opinion has just as many arguments against it.

39:41.960 --> 39:44.960
Just a quick question.

39:44.960 --> 39:46.960
My own experience.

39:46.960 --> 39:50.960
I've got a star 64 board and a couple of rocks here.

39:50.960 --> 39:54.960
Yeah, our board.

39:54.960 --> 40:02.960
So for the same clock speed and number of calls the star 64 seems to be half as performance.

40:02.960 --> 40:03.960
Yeah.

40:03.960 --> 40:07.960
Is that a fundamental hardware thing or is it just optimization?

40:07.960 --> 40:08.960
Is it going to catch up?

40:08.960 --> 40:15.960
So that's also what I was hoping to get out of this is that I want you to understand that.

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That because one chip is really slow that not mean that risk 5 is slow.

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Like risk 5 is just the PDFs that describe the instructions.

40:22.960 --> 40:30.960
The calls and the size of the twin sisters is usually what matters most in performance.

40:30.960 --> 40:42.960
And I know that for these 1971-10 the memory controller is not as fast as it should be.

40:42.960 --> 40:52.960
So that's maybe why you see that they are like the same clock speed but feels slower.

41:03.960 --> 41:04.960
Hey, thank you for the talk.

41:04.960 --> 41:10.960
This is about CPUIDs like instruction on X86 you have something like that.

41:10.960 --> 41:13.960
I have lately been working on arm. There's nothing like that.

41:13.960 --> 41:16.960
The question is about CPUDiscoverability.

41:16.960 --> 41:20.960
I've learned from a colleague who has been working on risk 5 much longer.

41:20.960 --> 41:22.960
Enable risk 5 and pedora.

41:22.960 --> 41:24.960
Research Jones.

41:24.960 --> 41:28.960
Risk 5 seems to be picking up some of the bad patterns from arm.

41:28.960 --> 41:32.960
And also someone else also in the absolute communities.

41:32.960 --> 41:33.960
Yeah.

41:33.960 --> 41:35.960
That's what we're testing of things.

41:36.960 --> 41:39.960
So people to not make this kind of mistakes.

41:39.960 --> 41:43.960
That's one and CPUID style instruction.

41:43.960 --> 41:45.960
And there's no instruction.

41:45.960 --> 41:47.960
I know there's nothing I've decided.

41:47.960 --> 41:52.960
But we do have, it's called CSRs, like special registers you can read from.

41:52.960 --> 41:56.960
And then you can get the ID of the arms.

41:56.960 --> 41:59.960
But yeah, it doesn't describe the board.

41:59.960 --> 42:03.960
So it's not enough to replace device trees.

42:04.960 --> 42:06.960
It's a bit of a mess on arm.

42:06.960 --> 42:08.960
Like the context is about CPU models.

42:08.960 --> 42:10.960
A bunch of CPU models for QMU.

42:10.960 --> 42:12.960
Enable immigration.

42:12.960 --> 42:15.960
So an arm, it is very tricky to get this.

42:15.960 --> 42:17.960
No such thing as CPU model.

42:17.960 --> 42:19.960
It's like a bag of discreet.

42:19.960 --> 42:20.960
It's a few ID.

42:20.960 --> 42:21.960
Yeah.

42:21.960 --> 42:23.960
So that's it.

42:23.960 --> 42:24.960
Thank you.

42:24.960 --> 42:26.960
In that regard, risk 5 is very much.

42:26.960 --> 42:27.960
Yeah.

42:27.960 --> 42:28.960
Hi.

42:28.960 --> 42:29.960
Thanks for the talk.

42:29.960 --> 42:30.960
I was curious.

42:30.960 --> 42:34.960
If you are aware of any, it is 5 GPUs on the market.

42:34.960 --> 42:38.960
Risk 5 CPUs on the market.

42:38.960 --> 42:42.960
GPUs on the market.

42:42.960 --> 42:46.960
I mean, you can buy a modern Nvidia card.

42:46.960 --> 42:53.960
And it has like three different kinds of risk 5 processors inside.

42:53.960 --> 42:57.960
Like some of them has like a whole operating system running.

42:57.960 --> 42:59.960
Like written in Ada.

42:59.960 --> 43:03.960
Just to manage all the requests it gets.

43:03.960 --> 43:07.960
So you can have like split out your graphics card to virtual machines.

43:07.960 --> 43:15.960
That's a whole talker from on that from the risk 5 conference in Santa Clara last year.

43:15.960 --> 43:20.960
But yeah, it's not something you can directly program yourself.

43:20.960 --> 43:26.960
But if you download the firmware for the Nvidia cards, you can also see that those risk 5 instructions.

43:27.960 --> 43:37.960
Yeah, I was wondering if you were aware about some hardware risk 5 IR advanced data protection implemented.

43:37.960 --> 43:39.960
Oh, there's a news.

43:39.960 --> 43:43.960
Are you talking about a new standard for how the software controller is working?

43:43.960 --> 43:44.960
Yeah, I don't know.

43:45.960 --> 43:47.960
Sorry.

43:53.960 --> 43:57.960
Hello, can you talk a little bit about RA23?

43:57.960 --> 43:58.960
Yes.

43:58.960 --> 43:59.960
All right.

43:59.960 --> 44:03.960
So lastly, I probably should have had a slide on this.

44:03.960 --> 44:05.960
So this is an interesting question.

44:05.960 --> 44:08.960
Because the risk 5 foundation.

44:08.960 --> 44:11.960
In order to manage all these different extensions,

44:11.960 --> 44:19.960
like it'll be really hard to when you're distribution like Ubuntu to figure out which extensions do we actually compile for?

44:19.960 --> 44:21.960
And which don't we?

44:21.960 --> 44:28.960
So the risk 5 foundation has tried to help all of us distributions by making the RVA.

44:28.960 --> 44:30.960
What are they called?

44:30.960 --> 44:33.960
RVA 23 is the latest one.

44:33.960 --> 44:36.960
What are they called specifications or what are they called?

44:36.960 --> 44:37.960
Profiles.

44:37.960 --> 44:38.960
That's the word.

44:38.960 --> 44:39.960
Yes.

44:40.960 --> 44:49.960
And Ubuntu, we have already said that the next LCS relief release will compile everything for RVA 23.

44:49.960 --> 44:55.960
So that means that in order to run the next release of the next LCS release of Ubuntu,

44:55.960 --> 45:04.960
you'll need a chip that has vectors, vector crypto and all the other extensions that are in the RVA 23 profile.

45:05.960 --> 45:14.960
So that means that all the hardware I'm showing you here will not be meant to run the latest LCS release of Ubuntu.

45:14.960 --> 45:18.960
Is the rock hanging waste work that you can buy now?

45:18.960 --> 45:19.960
Nope.

45:19.960 --> 45:29.960
So that's why I'm really hoping that we'll see some hardware for 26 that actually supports the full RVA 23 profile.

45:35.960 --> 45:45.960
But yeah, I mean it's a necessary step because vectors are important for people doing servers and also just graphics for your mobile phone.

45:45.960 --> 45:50.960
So we'll have to upgrade the baseline for a risk 5 at some point.

45:50.960 --> 45:57.960
And we've chosen to do it maybe a bit early, but it's gone, I mean other distributions will have to follow the engine.

45:57.960 --> 46:02.960
And we don't, simply don't have the resources to do like two versions of Ubuntu for a risk 5.

46:02.960 --> 46:08.960
And I take it this target profile also as the virtualization extension or not yet.

46:08.960 --> 46:10.960
Yes.

46:10.960 --> 46:15.960
Yes, that's it.

46:15.960 --> 46:16.960
Thank you.

